Computer Architecture: Practicals
Practical
No. 8
Title: To Study and Verify Combinational Logic Circuits
Aim
To understand the design and operation of a Full Adder circuit and to verify
its truth table and logical expressions.
Introduction
The Full Adder is a fundamental combinational logic circuit used to add three
single-bit binary numbers. Unlike the Half Adder, it can process an input carry
bit (Carry-in, Cin) from a previous stage of
addition, in addition to the two input bits (A and B).
This
capability makes the Full Adder a crucial component for constructing multi-bit
adders, essential for the arithmetic logic units in all CPUs. A precise
understanding of the Full Adder’s functionality is vital for comprehending how
digital computers perform arithmetic operations.
Procedure
/ Example
Full Adder
Design:
- Inputs:
A, B, Cin (Carry-in from a previous stage)
- Outputs:
Sum (S), Carry-out (Cout)
Truth
Table:
|
A |
B |
Cin |
Sum (S) |
Cout |
|
0 |
0 |
0 |
0 |
0 |
|
0 |
0 |
1 |
1 |
0 |
|
0 |
1 |
0 |
1 |
0 |
|
0 |
1 |
1 |
0 |
1 |
|
1 |
0 |
0 |
1 |
0 |
|
1 |
0 |
1 |
0 |
1 |
|
1 |
1 |
0 |
0 |
1 |
|
1 |
1 |
1 |
1 |
1 |
Logical
Expressions:
- Sum
(S): S = A XOR B XOR Cin
- Carry-out
(Cout): Cout = (A AND
B) OR (Cin AND (A XOR B))
- Equivalent
form: Cout = (A AND B) OR (A AND Cin) OR (B AND Cin)
Circuit
Diagram:
A Full Adder can be constructed using two Half Adders and an OR gate:
1.
First Half Adder adds A and B → produces partial sum and carry
2.
Second Half Adder adds partial sum with Cin
→ produces final Sum
3.
Carries from both Half Adders go to an OR gate → produces Cout
(Draw the
logic circuit diagram here, showing inputs A, B, Cin, two Half Adders, and an OR gate producing Cout)
Example:
Verification
Input: A =
1, B = 1, Cin = 0
- Sum (S)
= 1 XOR 1 XOR 0 = 0 XOR 0 = 0
- Carry-out
(Cout) = (1 AND 1) OR (0 AND (1 XOR 1)) = 1 OR 0
= 1
Binary
Addition: 1 + 1 + 0 = 10 (Sum = 0, Carry-out = 1) ✔
Exercises
1.
Draw the Logic Circuit Diagram
- Draw
the complete Full Adder circuit using standard gate symbols. Label inputs
(A, B, Cin) and outputs (Sum, Cout). You may use two Half Adders and an OR gate.
2.
Verify the Truth Table
|
A |
B |
Cin |
Sum (S) |
Cout |
|
0 |
0 |
0 |
||
|
0 |
0 |
1 |
||
|
0 |
1 |
0 |
||
|
0 |
1 |
1 |
||
|
1 |
0 |
0 |
||
|
1 |
0 |
1 |
||
|
1 |
1 |
0 |
||
|
1 |
1 |
1 |
Result /
Conclusion
This practical successfully demonstrated the fundamental operation of a Full
Adder, a key combinational logic circuit. By deriving its truth table, logical
expressions, and understanding its circuit implementation, students gained a
clear understanding of how three single-bit binary numbers are added. The Full
Adder serves as a foundational component for constructing more complex
arithmetic units in computer processing.