Practical No. 7
Title: To Study and Verify Combinational Logic Circuits

Aim
To understand the design and operation of a Half Adder circuit and to verify its truth table.

Introduction
Digital computers perform arithmetic operations using binary numbers. A combinational logic circuit is a digital circuit whose output depends solely on current inputs, without memory of past inputs.

The Half Adder is a simple combinational circuit that adds two single-bit binary numbers:

• Sum (S): Result of bit-wise addition
• Carry (C): Generated when both input bits are 1

The Half Adder cannot handle an input carry from a previous stage of addition, hence the name "half" adder. It forms the building block for more complex circuits like the Full Adder.

Procedure / Example

Half Adder Design

• Inputs: A, B (single-bit each)
• Outputs: Sum (S), Carry (C)

Truth Table:

A	B	Sum (S)	Carry (C)
0	0	0	0
0	1	1	0
1	0	1	0
1	1	0	1

Logical Expressions:

• Sum (S): S = A XOR B
• Carry (C): C = A AND B

Circuit Diagram:

• One XOR gate for the Sum output
• One AND gate for the Carry output

(Draw the logic circuit diagram here, labeling inputs A and B, and outputs S and C)

Example: Verification

Input: A = 1, B = 1

• XOR gate output: 1 XOR 1 = 0 → Sum = 0
• AND gate output: 1 AND 1 = 1 → Carry = 1

Binary Addition: 1 + 1 = 10 (Sum = 0, Carry = 1) ✔

Exercises

1.     Draw the Logic Circuit Diagram

• Draw the complete Half Adder circuit using standard gate symbols. Label inputs (A, B) and outputs (S, C).

2.     Verify the Truth Table

A	B	Sum (S)	Carry (C)
0	0
0	1
1	0
1	1

Result / Conclusion
This practical successfully demonstrated the operation of a Half Adder, a basic combinational logic circuit. By deriving its truth table, logical expressions, and circuit diagram, and verifying its functionality, students gained a clear understanding of how two single-bit binary numbers are added. This forms the foundation for understanding more complex arithmetic logic units in computer architecture.